Moore’s Law seems to be getting a constant reprieve from being repealed on a monthly basis with advances in the mechanics and manufacturing processing chips. The basis of today’s computation and chips is the binary language, but expanding substantively beyond computation capabilities of today may require going outside this paradigm into messy computation:

“Digital systems are prone to catastrophic errors,” Sarpeshkar says. “The propensity for error is actually much greater now than it ever was before. People are very worried.”

Brain like processing chips might be the next generation of computation – an example is Neurogrid:

It uses analog computation to emulate ion-channel activity and uses digital communication to softwire structured connectivity patterns. Because their operation is parallel or serial, respectively, these technologies impose different constraints. Analog computation constrains the number of distinct ion-channel populations that can be simulated—unlike digital computation, which simply takes longer to run bigger simulations. Digital communication constrains the number of synaptic connections that can be activated per second—unlike analog communication, which simply sums additional inputs onto the same wire. Working within these constraints, Neurogrid achieves its goal of simulating multiple cortical areas in real-time by making the following judicious choices.

Neurogrid simulates one million neurons by using two subcellular compartments (per neuron), a choice motivated by cortical studies. Nonlinear interactions between projections that terminate in distinct cortical layers have been replicated in a pyramidal-cell model with just two compartments. Furthermore, varying their electrical coupling replicates the firing patterns of various pyramidal-cell types. Using the smallest number of compartments that captures these behaviors lets us minimize the number of distinct ion-channel populations that need to be simulated.

Very cool – emulate the brain in silicon!